Integrate BACKBEAT SDK and resolve KACHING license validation
Major integrations and fixes: - Added BACKBEAT SDK integration for P2P operation timing - Implemented beat-aware status tracking for distributed operations - Added Docker secrets support for secure license management - Resolved KACHING license validation via HTTPS/TLS - Updated docker-compose configuration for clean stack deployment - Disabled rollback policies to prevent deployment failures - Added license credential storage (CHORUS-DEV-MULTI-001) Technical improvements: - BACKBEAT P2P operation tracking with phase management - Enhanced configuration system with file-based secrets - Improved error handling for license validation - Clean separation of KACHING and CHORUS deployment stacks 🤖 Generated with [Claude Code](https://claude.ai/code) Co-Authored-By: Claude <noreply@anthropic.com>
This commit is contained in:
anthonyrawlins
149
vendor/golang.org/x/sys/cpu/cpu_x86.go
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vendor/golang.org/x/sys/cpu/cpu_x86.go
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build 386 || amd64 || amd64p32
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package cpu
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import "runtime"
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const cacheLineSize = 64
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func initOptions() {
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options = []option{
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{Name: "adx", Feature: &X86.HasADX},
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{Name: "aes", Feature: &X86.HasAES},
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{Name: "avx", Feature: &X86.HasAVX},
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{Name: "avx2", Feature: &X86.HasAVX2},
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{Name: "avx512", Feature: &X86.HasAVX512},
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{Name: "avx512f", Feature: &X86.HasAVX512F},
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{Name: "avx512cd", Feature: &X86.HasAVX512CD},
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{Name: "avx512er", Feature: &X86.HasAVX512ER},
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{Name: "avx512pf", Feature: &X86.HasAVX512PF},
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{Name: "avx512vl", Feature: &X86.HasAVX512VL},
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{Name: "avx512bw", Feature: &X86.HasAVX512BW},
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{Name: "avx512dq", Feature: &X86.HasAVX512DQ},
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{Name: "avx512ifma", Feature: &X86.HasAVX512IFMA},
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{Name: "avx512vbmi", Feature: &X86.HasAVX512VBMI},
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{Name: "avx512vnniw", Feature: &X86.HasAVX5124VNNIW},
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{Name: "avx5124fmaps", Feature: &X86.HasAVX5124FMAPS},
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{Name: "avx512vpopcntdq", Feature: &X86.HasAVX512VPOPCNTDQ},
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{Name: "avx512vpclmulqdq", Feature: &X86.HasAVX512VPCLMULQDQ},
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{Name: "avx512vnni", Feature: &X86.HasAVX512VNNI},
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{Name: "avx512gfni", Feature: &X86.HasAVX512GFNI},
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{Name: "avx512vaes", Feature: &X86.HasAVX512VAES},
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{Name: "avx512vbmi2", Feature: &X86.HasAVX512VBMI2},
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{Name: "avx512bitalg", Feature: &X86.HasAVX512BITALG},
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{Name: "avx512bf16", Feature: &X86.HasAVX512BF16},
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{Name: "amxtile", Feature: &X86.HasAMXTile},
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{Name: "amxint8", Feature: &X86.HasAMXInt8},
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{Name: "amxbf16", Feature: &X86.HasAMXBF16},
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{Name: "bmi1", Feature: &X86.HasBMI1},
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{Name: "bmi2", Feature: &X86.HasBMI2},
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{Name: "cx16", Feature: &X86.HasCX16},
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{Name: "erms", Feature: &X86.HasERMS},
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{Name: "fma", Feature: &X86.HasFMA},
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{Name: "osxsave", Feature: &X86.HasOSXSAVE},
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{Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ},
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{Name: "popcnt", Feature: &X86.HasPOPCNT},
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{Name: "rdrand", Feature: &X86.HasRDRAND},
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{Name: "rdseed", Feature: &X86.HasRDSEED},
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{Name: "sse3", Feature: &X86.HasSSE3},
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{Name: "sse41", Feature: &X86.HasSSE41},
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{Name: "sse42", Feature: &X86.HasSSE42},
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{Name: "ssse3", Feature: &X86.HasSSSE3},
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// These capabilities should always be enabled on amd64:
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{Name: "sse2", Feature: &X86.HasSSE2, Required: runtime.GOARCH == "amd64"},
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}
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}
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func archInit() {
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Initialized = true
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maxID, _, _, _ := cpuid(0, 0)
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if maxID < 1 {
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return
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}
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_, _, ecx1, edx1 := cpuid(1, 0)
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X86.HasSSE2 = isSet(26, edx1)
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X86.HasSSE3 = isSet(0, ecx1)
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X86.HasPCLMULQDQ = isSet(1, ecx1)
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X86.HasSSSE3 = isSet(9, ecx1)
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X86.HasFMA = isSet(12, ecx1)
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X86.HasCX16 = isSet(13, ecx1)
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X86.HasSSE41 = isSet(19, ecx1)
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X86.HasSSE42 = isSet(20, ecx1)
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X86.HasPOPCNT = isSet(23, ecx1)
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X86.HasAES = isSet(25, ecx1)
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X86.HasOSXSAVE = isSet(27, ecx1)
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X86.HasRDRAND = isSet(30, ecx1)
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var osSupportsAVX, osSupportsAVX512 bool
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// For XGETBV, OSXSAVE bit is required and sufficient.
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if X86.HasOSXSAVE {
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eax, _ := xgetbv()
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(1, eax) && isSet(2, eax)
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if runtime.GOOS == "darwin" {
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// Darwin requires special AVX512 checks, see cpu_darwin_x86.go
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osSupportsAVX512 = osSupportsAVX && darwinSupportsAVX512()
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} else {
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// Check if OPMASK and ZMM registers have OS support.
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osSupportsAVX512 = osSupportsAVX && isSet(5, eax) && isSet(6, eax) && isSet(7, eax)
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}
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}
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X86.HasAVX = isSet(28, ecx1) && osSupportsAVX
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if maxID < 7 {
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return
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}
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_, ebx7, ecx7, edx7 := cpuid(7, 0)
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X86.HasBMI1 = isSet(3, ebx7)
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X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX
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X86.HasBMI2 = isSet(8, ebx7)
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X86.HasERMS = isSet(9, ebx7)
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X86.HasRDSEED = isSet(18, ebx7)
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X86.HasADX = isSet(19, ebx7)
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X86.HasAVX512 = isSet(16, ebx7) && osSupportsAVX512 // Because avx-512 foundation is the core required extension
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if X86.HasAVX512 {
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X86.HasAVX512F = true
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X86.HasAVX512CD = isSet(28, ebx7)
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X86.HasAVX512ER = isSet(27, ebx7)
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X86.HasAVX512PF = isSet(26, ebx7)
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X86.HasAVX512VL = isSet(31, ebx7)
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X86.HasAVX512BW = isSet(30, ebx7)
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X86.HasAVX512DQ = isSet(17, ebx7)
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X86.HasAVX512IFMA = isSet(21, ebx7)
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X86.HasAVX512VBMI = isSet(1, ecx7)
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X86.HasAVX5124VNNIW = isSet(2, edx7)
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X86.HasAVX5124FMAPS = isSet(3, edx7)
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X86.HasAVX512VPOPCNTDQ = isSet(14, ecx7)
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X86.HasAVX512VPCLMULQDQ = isSet(10, ecx7)
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X86.HasAVX512VNNI = isSet(11, ecx7)
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X86.HasAVX512GFNI = isSet(8, ecx7)
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X86.HasAVX512VAES = isSet(9, ecx7)
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X86.HasAVX512VBMI2 = isSet(6, ecx7)
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X86.HasAVX512BITALG = isSet(12, ecx7)
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eax71, _, _, _ := cpuid(7, 1)
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X86.HasAVX512BF16 = isSet(5, eax71)
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}
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X86.HasAMXTile = isSet(24, edx7)
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X86.HasAMXInt8 = isSet(25, edx7)
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X86.HasAMXBF16 = isSet(22, edx7)
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}
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func isSet(bitpos uint, value uint32) bool {
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return value&(1<<bitpos) != 0
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}
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